ESD
Last Updated: Mar 20th, 2009 - 10:35:32
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ESD sensitivity of semiconductor devices continues to rise, and many IC manufacturers find themselves in an unfamiliar territory. Until very recently, ESD was something of a secondary concern which really didn’t impact the yield but was somewhat procedural, that is, install ESD floors, buy an ionizer, use a wriststrap, and you’re done. However, this approach no longer works and the reasons are rather fundamental and irreversible.
There are two main reasons why ESD sensitivity of the devices is on the rise, and a plethora of smaller but still important reasons.
One of main reasons is device geometry. Many of today’s semiconductor manufacturers are shrinking the size of their dies to both reduce the cost and to fit more transistors (i.e. functionality) on the die. Reduced geometry under identical circumstances reduces amount of energy necessary to damage the miniature elements of these devices. A 32nm device is much more sensitive to ESD than a 100nm device.
A second main reason is the high-frequency operation of the today’s devices. Essentially, all ESD protective structures on a chip ultimately act as a low-pass filter. If an IC is designed for high speed, it simply cannot have adequate ESD protection on silicon since such protection will affect the quality of the signal in many ways.
Other reasons for the rise in ESD sensitivity include excessive optimization of die size, which leads to a reduction of the ESD protective structure, rendering it less effective; a large number of pins which, among other things, increases number of vulnerability points and a statistical probability of ESD exposure; and specialty materials for encapsulation, which may have undesirable tribocharging properties.
The increase in sensitivity of devices is often instantaneous. A new device that just arrived in production may have 50V CDM (charged device model) damage level, while previous devices enjoyed at least 200V protection. Suddenly, the yield drops to low digits and the product cannot be delivered to the customer. Panic is never a good strategy, especially in this case, so a good understanding of ESD exposure at each step of the device manufacturing process goes a long way toward preparing the factory for new ESD challenges, and for a smooth transition to new Class 0 devices.
ESD Exposure in Back-End Semiconductor Processing There are a number of steps in a back-end semiconductor manufacturing – typically about 17. Some of these steps are more prone to expose the devices to dangerous levels of ESD. The examples in this article refer only to those steps which are more likely to generate ESD exposure.
Most failures are discovered during IC testing. Therefore, it is a common misconception that this is the place where devices are damaged. Instead, this is more often the place where damage is discovered, and not necessarily the source of damage. Let’s examine just a few of the most probable steps in back-end IC manufacturing where ESD damage can occur.
The data in this article were obtained using a proprietary ESD monitor (3M’s EM Aware model ESD monitor, shown in Figure 1). This ESD monitor is capable of monitoring both ESD events and static voltage, which helps with ESD diagnostics. It measures the properties of the waveform of the discharge and generates a pulse signal with the magnitude that is a reflection of the discharge strength.
Figure 1: An example of an ESD monitor
This device is also fully characterized for different models of discharge, so that the user can know that a particular event was, say, 100V CDM, or 200 V CDM. The monitor also has the ability to resolve multiple discharges, a critical feature in fast-moving tools. Connected to a data acquisition system which can accommodate a substantial number of such monitors, the end user can run ESD diagnostics and troubleshooting in several locations simultaneously.
ESD monitors are easy to use and, together with data acquisition system, are capable of recording everything they see in the manufacturing process. ESD monitors can be used for a variety of purposes, such as:
- ESD problem diagnostics
- ESD audits
- ESD qualification of the tools and the processes
- Supplier audits
Wafer Saw This is one of the first steps at the back-end of device manufacturing. A wafer is being sawed into dies, while these dies still remain together as a part of a wafer resting on a backing of a Mylar film. Sawing is capable of creating substantial charge due to significantly different positions on the tribocharge scale between the steel blade of the saw and the silicon of the wafer. Even though the rim of the saw is covered with diamond abrasives, it is very thin and, sooner or later, the steel sides of the blade come into contact with silicon generating charges.
To alleviate this problem, the de-ionized water or alternative fluids in which the sawing takes place is made partially conductive, by using carbonation, for example. The resistivity of such partially conductive fluids is usually kept within 12 to 18 MOhms, but this may create other problems. The extremely short distances between the saw and the adjacent exposed pads of the die offer low actual resistance, which may lead to high current caused by high tribocharge voltage generated during sawing. This may expose devices to EOS (electric overstress), an excessive voltage that lasts longer than an ESD event, or discharge.
How do we determine whether there are ESD events or EOS occurrences? The specific challenge for the wafer saw process is that the process is taking place in a highly corrosive environment (i.e., de-ionized water). Any exposed metal part such as an antenna or a sensor submerged in this fluid would quickly corrode. To prevent this from happening, submerge the sensor wrapped in a chemically-insulative enclosure (see Figure 2) into the fluid during the process to test for ESD events and for the static field resulting from charge.
Figure 2: Measurements of ESD events in wafer saw process
For an EOS test where the galvanic contact is essential, the only metals suitable for contact with de-ionized water are noble metals (e.g., gold and platinum). Materials with highly passive oxide films (304/316 SS, Ti, Zr) and aluminum (1100, 3003, 5052, etc.) may not be able to provide the proper electrical contact, even though they are capable of surviving the corrosion effect.
Die Attach This is a two-step process: first, separation of die from the wafer, and then die placement on the leadframe.
Separation The already sawn wafer is typically held on a Mylar backing. Since there is no way to ground an insulator (i.e., both the wafer and the Mylar backing), the whole combination must be considered charged. If a vacuum pick is conductive and is grounded via the tool, there is always a possibility of a discharge during its contact with the die.
Next, during separation of the die from the Mylar backing, the die attains a high charge level due to significantly different positions of Mylar and silicon on the tribocharge scale (silicon is highly negative, and Mylar, while still negative, is much closer to zero). When the die is rapidly lifted, the voltage on the die increases, setting the stage for the possibility of a discharge between the lifted die and the dies left on the Mylar backing. Whether discharge happens or not, a die can still retain charge.
Die Placement When a charged die is placed on the leadframe, there is a strong possibility of a discharge. Figure 3 shows the actual ESD exposure during this process as observed with ESD monitors. The two ESD sensors were positioned in the process, each measuring both static voltage and ESD events. (All discharges shown from this point in the article are indicated by the ESD monitor as pulses with the same width but with the different magnitude, depending on the strength of the discharge.)
As seen from the top two charts (Figure 3), the first discharge occurs during the contact between the conductive vacuum pick and the die. Then, in several milliseconds, the die is pulled off the Mylar sheet and the developing static voltage is shown on the second chart As the die is being lifted, a discharge to nearby dies occurs within few milliseconds.
Figure 3: ESD exposure in die attach process
The die still retains some charge vs. ground – the last discharge has occurred between the two non-grounded objects. When this die is placed on the leadframe, yet another discharge occurs as shown in the third chart (Figure 3).
Wire Bonding During the EFO (electric flame-off) wire bonding process, the high-voltage spark melts the end of the gold bonding wire and produces a soft gold ball at the end of it, which is attached to the pad of the device. This spark is generated outside the device. By itself, this spark is normally not a problem. However, if the bonding wire grounding is intermittent, the energy of EFO pulse can be briefly stored in the spool of wire, and then transmitted to the pad.
Figure 4 shows discharges captured by an ESD event monitor during the bonding process. As seen, every time there is an EFO action, this event is captured. In a properly bonded device, one can know how many pins were bonded by simply counting number of such discharges. However, if the tool is not properly maintained, there may be secondary discharges, which can be easily recognized when using proper tools. Unfortunately, a commonly-used high-speed oscilloscope won’t be able to recognize such pulses as out-of-sync, due to triggering issues.
Figure 4: ESD exposure in wire bonding process
Wire bonders need to be regularly maintained to ensure that the wire path provides good, consistent grounding for the passing wire.
Singulation This is a process where an array of leaded devices still connected together by a joined leadframe is separated into individual devices. This process is achieved either by sawing or stamping. Either way, this process is one of the “usual suspects” for significant ESD exposure due to multiple metal-to-metal contacts in the tool.
ESD exposure is aggravated if the internal parts of the tool itself are not properly grounded. In such cases, different metal parts can have voltage on them, and can also produce discharges during operation.
Figure 5 presents a typical (though not desirable) ESD environment in a singulator. This particular tool has serious grounding problems between its various internal parts, and this is clearly seen on the bottom chart of Figure 5, with a static voltage on a metal shuttle that moves back and forth vs. the ESD sensor.
This grounding problem causes multiple discharges between parts of the tool as shown on the left part of the top chart of Figure 5. These ESD events occur even before the devices arrive into the process. However, once the devices arrive (right part of the same chart), one can see increased ESD activity, with discharges in this case exceeding 200V CDM.
Figure 5: ESD environment in a singulator
IC Handlers As we noted earlier in this article, the IC handler is where most of the damaged devices are discovered. This, however, may not be the place where the devices were damaged, since there are a number of steps in back-end semiconductor manufacturing, and the IC test is almost the last one. Nonetheless, the IC handler, in combination with the IC tester, is a significant contributor to ESD exposure due to excessive metal-to-metal contacts.
Figure 6 shows the typical places of discharges in the IC handler. As Figure 6 shows, a discharge is highly probably in every place where the device is lifted or put down. Some discharge locations present more danger than the others. From lifting the IC from the test socket, through placing and lifting the IC to and from the shuttle, to placing the IC into the exit tray, there is no way of discovering a damaged device. This may result in unknowingly shipping defective components to the customer. Only diligent ESD diagnostics, along with proper tools, can discover ESD exposure at each step of the process.
Figure 6: Discharges in the IC handler
In-Process ESD Monitoring In order to ensure that ICs exposed to high levels of ESD are not shipped to customers, an in-process integrated ESD monitoring system can be implemented. Figure 7 shows a sensor of an integrated ESD monitor installed in an IC handler. This particular sensor is installed on moving robotic arm. It senses ESD events using a miniature antenna (white “stick”), which sends processed signals to a central control unit which, in turn, communicates with the IC handler’s computer.
Figure 7: An example of an integrated ESD monitor
Whenever an IC has been exposed to ESD above the user-set level, the IC is automatically placed in a “red” (rejects) tray. If too many ESD events occur within short period of time, the IC handler can optionally stop and alert the operator. In addition, the IC handler is computerized, and can keep data on ESD exposure as a histogram. This data can be very valuable for future analysis.
Integrated ESD monitors provide assurances to both the IC manufacturer and the customer that devices exposed to high levels of ESD are not shipped.
The Problem with the Trays The ubiquitous static-dissipative JEDEC trays containing IC devices are supposed to be protective against ESD, and they are to some degree. Conductive trays are supposed to dissipate charge on components in a safe way. However, on closer examination, there are several issues that may cause undesirable ESD exposure.
To begin with, many devices rest on the raised sections of the tray on their encapsulation, with the pins not touching the tray (Figure 8). This definitely won’t help the device to dissipate the charge.
Figure 8: IC in a tray
There is also a discrepancy between the resistivity test for the trays that is performed per applicable standards with the 5 lb weight and the weight of the device itself, which is typically less than a gram. Obviously, lighter devices will have a different resistive connection to the tray, and the dissipation time will be significantly higher.
However, the biggest problem arises when the device is lifted from the tray. During the “lift-off,” the encapsulation of the IC generates a charge (the mutual tribocharge properties of encapsulation and of tray material are not typically part of the qualification process for trays). It is not uncommon to encounter up to 200V on an IC that has just been lifted from the tray.
Once the encapsulation is charged, the substrate and the leadframe of the device is charged as well via capacitive coupling. Once the device is lifted from the tray, it can no longer dissipate its charge via the tray. In the IC handler, in a matter of less than a second, the lifted device gets placed on the usually conductive input shuttle. The result is frequent, albeit inconsistent, discharges, with the discharge occurrences dependent on the material of a particular tray.
Figure 9 shows the typical pattern of discharges to the IC shuttle. The data is compressed. Each “packet” of pulses from ESD event monitor indicates a different tray. As seen, there is a significant difference between different trays. The most damaging factor in such situation is that the user has very little control, if any, of the type of the trays in which the ICs are being received.
Figure 9: Discharges to the shuttle of IC handler
Ionizers providing airflow to the device in motion can help to dissipate the charge. However, the extremely short time allocated to the ionizer to bathe the device in the ionized air, combined with the very small size of the device and plenty of metal surrounding it, severely restricts the ability of the ionizer to effectively reduce the charge.
Conclusion Due to increasing sensitivity of the ICs, ESD control in IC manufacturing is now an integral part of quality control. As such, it should not be managed “by disaster.” A well-planned and well-executed ESD management program is essential in today’s process. Assumptive measures (ESD materials, floors, wriststraps, ionizers, etc.) that provide no feedback of their results are no longer enough. Only factual knowledge of ESD exposure at every step provides closed-loop control of required for an effective ESD program, and helps provide assurance to both IC manufacturers and their customers. n
Vladimir Kraz is with Instrumentation Product Development in the Electronic Solutions Division of 3M, and can be reached at vkraz @mmm.com.
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