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Editor’s Note: This is the second in a series of occasional articles on system level ESD testing.

This is the second in a series of articles on system level ESD testing. In the first article, the current waveform for system level ESD testing, such as IEC 61000-4-2 and ISO 10605, were compared with the current waveforms for Human Body Model (HBM), Machine Model (MM) and Charged Device Model (CDM) for ESD testing of integrated circuits. It was shown that the current levels for a system level stress are much higher than those for integrated circuits, and combine the fast rise time and peak current characteristics of CDM with the longer duration stress of HBM. Systems need the higher levels of stress during test because few systems such as cell phones or computers are intended for use only in an ESD-controlled environment such as those used for the handling of electrical components during electronics manufacture.

The specification of the stress waveform is only the first step in defining system ESD testing. Many elements go into designing an ESD stress test that will give useful and repeatable results. This article will outline the essential features of a repeatable ESD test on a full system, based on the most widely used ESD test for systems, IEC 61000-4-2.

Aspects of System Level ESD Testing
The goal of system ESD testing is to ensure that ESD events that occur during normal day-to-day use of a finished product do not result in an unhappy user. Physical damage is not required for a system to fail an ESD test. The system must also perform its intended function during and after the ESD event.

This results in two important features of a system level test. The first is that the system under test must be a powered and functioning during the test. The second is that the response of the system to the stress is not a simple pass/fail, but has at least 4 levels of possible system response as outlined in Table 1. (The different levels of system response to ESD stress will be discussed in more detail in the section on “Operating State and Failure Definition.”)

Response Class	Description of Failure
1	System performs within specification during ESD stress
2	System upset by ESD stress but recovers without user intervention
3	System upset by ESD stress; user intervention needed to correct problem
4	System physically damaged requiring repair or replacement

Table 1: Different levels of system response to ESD stress.
(The response class numbers are not defined in the standard but are being used for clarity in this article.)

Test Environment
The next step in defining a reproducible ESD test for a system is the definition of a well-defined test environment. We will discuss the environment specified by IEC 61000-4-2 for table top or small systems. There is a separate, but similar, setup for floor standing equipment.

The basic setup is shown in Figure 1. On the laboratory floor is a metallic Ground Plane (GP) that is electrically tied to the building ground of the laboratory. A wood table is placed on the Ground Plane. On top of the table is a metallic Horizontal Coupling Plane (HCP) covered by a 0.5mm thick insulator. The HCP is connected to the GP through a pair of 470kΩ resistors in series, one close to the GP and one close to the HCP. To prevent interference from the surrounding environment, the test setup must be kept away from other equipment and objects such as metal walls.

Figure 1: Test setup for ESD testing of small or table top systems as specified by IEC 61000-4-2.

The Equipment Under Test (EUT) is placed on the insulator away from the edges of the insulator and HCP. If the unit is mains powered, it is plugged into the building power in a situation close to use condition. If it is battery–powered, there is no explicit ground connection.

Since air discharge is affected by atmospheric conditions there are limits specified in the IEC standard for temperature, humidity and atmospheric pressure.

Stress Conditions
Now that the environment for the EUT has been established, the actual stress to the system must be defined. There are two types of stress, each with two subsets.

Direct Discharge

Air discharge
Contact discharge

Indirect Discharge

Discharge to the HCP
Discharge to the Vertical Coupling Plane (VCP)

Direct air discharge is the test that is most intuitive; a charged ESD gun is brought close to the EUT until an air discharge occurs. This test closely resembles a real world event. Air discharges are not, however, the most reproducible of events. An arc in air depends on many things, including air pressure, altitude, temperature, humidity, geometry and speed of approach. A more reproducible discharge occurs for contact discharge, in which the stress event is initiated not by an arc in air but by the closing of a relay.

To understand the difference, it is useful to return to the schematic of an ESD gun as it was presented in the first article in this series (see Conformity, October 2007) and is reproduced in Figure 2. In contact discharge, the relay S2 starts in the open position, the 150pF capacitor is charged to the test voltage through the relay S1 and the high value resistor, the gun is placed against the EUT, the gun’s trigger is pulled and relay S1 opens and a short time later relay S2 closes and a stress occurs.

Figure 2: Schematic of an ESD gun

In air discharge the sequence is different. The relay S2 stays closed throughout the testing. The gun is held away from the EUT and the gun’s trigger is pulled. The gun charges the capacitor through relay S1 and then opens the relay. The gun is then moved toward the EUT. As the gun approaches the EUT a discharge can occur, resulting in an ESD stress. Discharge may not occur if the surface being stressed is an insulator and the test voltage is not high enough to cause an arc to a conducting surface.

An additional difference between the air discharge and contact discharge is the type of tip used on the ESD gun. In contact discharge, a pointed tip is used. This allows the tip of the gun to be positioned very precisely, and can even be used to scrape away any thin insulating material on the surface. In air discharge, a rounded tip is used, similar in radius to a finger. The round tip produces a more severe air discharge stress than a pointed tip will produce. A pointed tip produces a larger electric field around the tip of the gun which results in an arc forming at a greater distance from the EUT. Longer arcs have higher resistance and greater inductance, resulting in slower rise times and lower peak currents.

The obvious question is, which test should be done, air discharge or contact discharge? It is the nature of the EUT that determines this. Contact discharge is done to conducting surfaces such as metal cases, metal fittings associated with knobs or switches, and to the metal shells of connectors. Note that IEC 61000-4-2 specifically states that connector pins are not to be stressed with contact discharge. (Testing of connectors will be discussed in more detail below.) Insulating surfaces must be tested using air discharge.

Developing the Test Plan
The development of a test plan for direct discharge is the next issue to address. The IEC standard calls for 10 discharges at each test point for both positive and negative stresses. Where to apply the stress is important. As in any test plan, it is important to balance doing a thorough test and spending more time doing the test than necessary. The nature of the EUT determines the test plan guided by the question “how is this product used in a day to day basis?”

The first step is where not to test. The IEC standard excludes any non-user accessible parts of the equipment. Emphasis needs to be on areas that are touched most frequently and where an ESD event is most likely to cause an upset. Obvious targets are data entry keys, vent holes in a case, seams in a plastic case and the area around connectors. It makes little sense, however, to blast away at the center of an unbroken plastic case.

As mentioned above, connectors deserve special discussion, and the IEC standard devotes considerable attention to the testing of connectors. For connectors with metal shells, contact discharge is to be done only to the metal shell and never directly to the pins. For connectors with a plastic body, only air discharge is to be used.

An additional issue is whether the test should be conducted with the cable in place or not in place. If the cable to the connector is always in place during use, then the test should be performed with the cable in place. If the cable may or may not be present during normal operations, it may be prudent to do the testing both with and without the cable attached. When cables are attached during the test, their opposite end should be terminated either with a functioning unit or at least to a termination that matches that used in normal operation.

ESD events involve a large burst of current, in the range of several to 10s of amps, in a 1 to 10s of ns time period. This results in considerable electromagnetic disturbances that can upset a systems function. This explains why an ESD discharge in the near proximity of a functioning system can cause system upset. Indirect discharge tests look for this kind of susceptibility in the EUT.

Indirect discharge is done with the ESD gun in the contact discharge mode to the HCP and the Vertical Coupling Plane (VCP) as shown in Figure 1. The VCP is attached to the GP with a pair of 470kW resistors in a similar manner as the HCP. The ESD gun is held in the plane of the coupling plane and perpendicular to the edge and discharged into the edge of the plane. For the VCP, the unit is placed 0.1m away from the VCP, and tests should be conducted with the coupling plane adjacent to all 4 sides of the EUT.

Operating State and Failure Definition
Before testing can begin it is necessary to define the operating state for the EUT, and to define the failure criteria. As always, these decisions are a compromise, and will vary from product to product. Ideally, “all operating states” of a system should be tested. This is, however, clearly impractical for most units. A mode of operation that exercises a large fraction of the internal circuits of a product is obviously a plus.

Complex, software-based systems such as computers present special challenges and opportunities for devising good test plans. A computer sitting idle with a static web page on the screen would likely leave much of its functionality untested. A better plan would be to devise a test state with active storage and retrieval of data from the hard drive, some form of CPU activity, such as a repetitive calculation, as well as communicating over its Ethernet or wireless connections, providing a very active and easier to upset test condition. A good design will also be able to automatically capture upset performance.

Definition of the failure responses is also important and best determined before testing begins. Examples of possible system responses to stress based on the categories in Table 1 are shown in Table 2, based on the computer example above.

Response Class	Description of Failure	Symptoms
1	Performs within specification	Computer continues to function
2	Upset; recovery without intervention	Increased error rate on wireless but error correction works Screen flickers but recovers
3	Upset; user intervention needed	System lockup requiring re-boot Error in calculation
4	Physically damaged requiring repair	LAN connector no longer functions even after re-boot

Table 2: Sample failure symptoms for different classes of failure

Prevention of Charge Buildup
During direct ESD testing of a system, considerable charge is injected into the EUT during each stress. If this charge is not removed from the EUT between stresses, subsequent stresses will be significantly different than intended. The IEC standard warns that charge buildup can result in a far more intense stress than intended.

Consider an EUT stressed several times without removing the injected charge. After several stresses, the voltage of the unit can approach the test voltage, and an arc can occur either within the EUT or to its surroundings. This arc could be very severe. The total charge in the arc could be much larger than the charge from a single stress from the ESD gun. Furthermore the peak current could be extremely high because the 330Ω resistor in the ESD gun would not be present for charge already stored within the EUT.

It is also possible for charge build up to result in under-stressing of the EUT. As charge builds up, the amount of charge injected into the EUT on subsequent stresses will decrease, reducing the amount of stress during the latter pulses.

The buildup of charge on the EUT can be detected with the use of an electrostatic field meter. A less scientific method (and much less pleasant way) is to pick up the EUT after stressing and experience a pronounced shock.

Removal of charge can be done several ways. Care must be taken to not drain off the charge too quickly, since discharging a charged device with a low impedance path to ground is an ESD event itself. An EUT with a metal case that is connected to house ground will obviously not build up charge. An EUT with a metal case that is not connected to ground can be connected to ground through a 1 MΩ path that will slowly bleed off the charge between stresses. An EUT with an insulated case provides the biggest challenge. The IEC standard suggests the use of air ionization to speedup the neutralization of the built up charge. The air ionization cannot be on during air discharge stress, since the ionized air will tend to reduce the voltage on the ESD gun as it is moved toward the EUT.

Possibly the most useful method of charge removal, or more accurately neutralization, is the use of a dissipative brush connected to ground through a 1MΩ resistor such as a person wearing an ESD wrist strap. This method has several advantages. It removes the charge more quickly than can be done with air ionization and without affecting the effectiveness of air discharge testing. It works on both insulators and conducting surfaces, and it is operationally straight-forward.

Summary
In the first article in this series, the current waveforms for system level ESD testing were compared to the current waveforms for device level testing. In this second article the basics of system level testing have been reviewed, including the basic test setup, the types of stresses a system is subjected to, how to design an ESD test plan and how to ensure that charge does not build up on the device during testing.

Robert Ashton is a senior protection and compliance specialist at ON Semiconductor, and can be reached at Robert.Ashton@onsemi.com.